VLSI Trainee engineer -Reinfold Physical Innovation Labs

REINFOLD Physical Innovation Labs was started in the year 1998 with a commitment to offer total Embedded as well as VLSI Hardware solution under one single roof to their esteemed customers.
. We "Design and Develop the Hardware and Software products" to keep in tune with the developing technology in the field of Embedded electronics and also to offer good sales support with effective service backup and technical support. The company is strengthening its R&D, Sales & Service Department in various places of India for much better results. We undertake bulk/customized operations and specialize in undertaking institutional offers to cater the needs of different institutions.

Job Description
FPGA Design Engineer
Job Description:

B.E./B.Tech/M.E./M. Tech. in Electronics or equivalent.
0-2 years experience in the VLSI/FPGA Design/Verification with familiarity in VHDL/Verilog hardware description languages
Familiar with Altera/Xilinx CPLD/FPGA’s with their latest tools for synthesis, implementation, verification and debugging
Experience in Design/Verification of Memory Interfaces (SRAM/DDR/DDRII/FLASH) for ASIC/FPGA’s
Experience in any of the protocol implementations like Ethernet/PCI/USB/ATM for FPGA/ASIC
Experience in interfacing keyboard/LCD, ADC/ DAC to FPGA and implementation of serial protocols like RS232/422, SPI etc.
Experience in processor interface design and implementation for FPGA/ASIC will be a plus
Experience in FPGA optimization, selection, power budgeting and generating requirement specifications, design documents is desirable-
Good communication skills with ability to work in team environment

LocationsAhmedabad, Bangalore

Experience0 - 2 years

Key Skillsvhdl verilog fpga

EducationBCA, B.E/B.Tech, B.Sc, Diploma, MCA, M.E/M.Tech/MS, M.Sc, PG Diploma

Role FresherTraineeSoftware Engineer/ Programmer

IndustryIT/ Computers - Software

Salary1.20 - 2.60 lacs

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